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Freescale QorIQ P1025 Tower MPU模塊開發(fā)方案

2012-09-05
關(guān)鍵詞: 微處理器|微控制器 QorIQ P1025

Freescale公司的QorIQ P1025通信處理器采用Power架構(gòu)e500內(nèi)核,32 KB L1 高速緩存,工作弊頻率高達(dá)667 MHz,支持ECC的32位DDR2/DDR3 SDRAM存儲器控制器,帶ECC的246KB L2緩存,兩個10/100/1000Mbps增強(qiáng)三速以太網(wǎng)控制器(eTSEC),主要用在工業(yè)機(jī)器人,智能電網(wǎng)和智能電表,網(wǎng)絡(luò),以太網(wǎng)交換,多服務(wù)商業(yè)網(wǎng)關(guān),WLAN接入點(diǎn)和固定路由器.本文介紹了QorIQ P1016和P1025主要特性,QorIQ P1016和P1025方框圖,TWR-P1025 Tower MPU模塊主要特性,框圖和完整電路圖.

The QorIQ P1 platform series, which includes the P1016 and P1025 communications processors, offers extensive integration and extreme power for a wide variety of applications in the networking, telecom, defense and industrial markets. Based on 45 nm technology for low-power implementation, the P1016 and P1025 processors provide single- and dual-core solutions for the 400 MHz to 667 MHz performance range, along with advanced security, QUICC Engine for multiprotocol support and a rich set of interfaces.

The QorIQ P1016 and P1025 processors are pin-compatible with the QorIQ P1015, P1024 products, and software compatible with the P1011/P1020 and P2010/P2020 offering a six-chip range of cost-effective solutions. Scaling from a single core at 400 MHz (P1015) to a dual core at 1.2 GHz per core (P2020), the two QorIQ platforms deliver an impressive 4.5x aggregate frequency range.

QorIQ P1025主要特性:

Dual (P1025) or single (P1016) high-performance Power Architecture® e500 cores, 32 KB L1 cache, up to 667 MHz

32-bit DDR2/DDR3 SDRAM memory controller with ECC support

256 KB L2 cache with ECC. Also configurable as SRAM and stashing memory

Two 10/100/1000 Mbps enhanced three-speed Ethernet controllers (eTSECs)

QUICC Engine module supporting UTOPIA-L2, four T1/E1/HDLC and two 10/100 Ethernet interfaces

High-speed interfaces supporting various multiplexing options:

Four SerDes up to 3.125 GHz multiplexed across controllers

Two PCI Express® interfaces

Two SGMII interfaces

Dual high-speed USB controllers (USB 2.0)

Integrated security engine

Protocol support includes SNOW, ARC4, 3DES, AES, RSA/ECC, RNG, single-pass SSL/TLS, Kasumi, XOR acceleration

eLBC, TDM, eSDHC, Dual I2C, DUART, PIC, DMA, GPIO

Package: 561-pin temperature-enhanced plastic BGA (TEPBGA1)

0C to 125C Tj -40C to 125C Tj option

QorIQ P1025目標(biāo)應(yīng)用:

Industrial

Industrial Robot

Smart Grid and Smart Metering

Networking

Ethernet Switch

Multi-Service Business Gateway

Wireless LAN Access Point

Fixed Routers

圖1.QorIQ P1016和P1025方框圖

TWR-P1025 Tower MPU模塊

The TWR-P1025 is a Tower Controller Module compatible with the Freescale Tower System. It can function as a stand-alone, low-cost platform for the evaluation of the QorIQ P1xxx family of microprocessor (MPU) devices. The TWR-P1025 features the QorIQ P1025 dual core processor based on the PowerPC® e500 core architecture.

The TWR-P1025 is available as a stand-alone product or can be combined with the Tower Elevator Modules (TWR-ELEV) and other Tower eco-system components to create development platforms for a ide variety of applications.

TWR-P1025 Tower MPU模塊主要特性:

The features of the TWR-P1025 Tower MPU Module:

• Tower compatible microprocessor module

• Dual core P1025 in a 561 TEPBGA package operating up to 533 MHz

• P1025 JTAG

• CPLD JTAG

• Three axis accelerometer (MMA8451Q)

• Two (2) user-controllable LEDs

• One (1) reset pushbutton switch

• Ten-way DIP Switch for configuration

• microSD card slot

• mini-PCIe slot

• Two (2) 10/100/1000Mbps Ethernet RJ45

• Two (2) USB2.0 Type A

• One (1) mini-USB TypeB dual UART

• 512 MB DDR3@667 MHz

• 64 MB Flash

• IEEE1588 pinned to header + DAC and VXCO (DNP option)

圖2.TWR-P1025 Tower MPU模塊外形圖

圖3.TWR-P1025 Tower MPU模塊框圖

圖4.TWR-P1025 Tower MPU模塊電路圖(1)

圖5.TWR-P1025 Tower MPU模塊電路圖(2)

圖6.TWR-P1025 Tower MPU模塊電路圖(3)

圖7.TWR-P1025 Tower MPU模塊電路圖(4)

圖8.TWR-P1025 Tower MPU模塊電路圖(5)

圖9.TWR-P1025 Tower MPU模塊電路圖(6)

圖10.TWR-P1025 Tower MPU模塊電路圖(7)

圖11.TWR-P1025 Tower MPU模塊電路圖(8)

圖12.TWR-P1025 Tower MPU模塊電路圖(9)

圖13.TWR-P1025 Tower MPU模塊電路圖(10)

圖14.TWR-P1025 Tower MPU模塊電路圖(11)

圖15.TWR-P1025 Tower MPU模塊電路圖(12)

圖16.TWR-P1025 Tower MPU模塊電路圖(13)

圖17.TWR-P1025 Tower MPU模塊電路圖(14)
詳情請見:
http://cache.freescale.com/files/32bit/doc/user_guide/TWR-P1025HUG.pdf?fr=g

http://cache.freescale.com/files/32bit/hardware_tools/schematics/TWRP1025SCH.pdf?fr=g



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